CEVA, Inc., the licensor of wireless connectivity and smart sensing technologies and co-creation solutions, introduced PentaG-RAN, the 5G baseband platform IP for ASICs targeting cellular infrastructure in both base station and radio configurations, including distributed units (DU), and remote radio units (RRU), from small cell to massive multiple-input, multiple output (mMIMO). This heterogeneous baseband compute platform has been designed to significantly reduce the entry barriers for companies wishing to break into the new market opportunities available in Open RAN (O-RAN) equipment.
The burgeoning market for 5G base station and radio ASICs is fueled by the digital transformation that continuously calls for higher cellular bandwidth at lower latency. More recently, network disaggregation driven by the Open RAN initiative and the drive for mMIMO has gained the attention of silicon vendors worldwide to the cellular infrastructure market opportunity. Global technology intelligence firm ABI Research forecasts that shipments of 5G outdoor mobile infrastructure equipment, including mMIMO radios, O-RAN radios, small cells and virtual basebands is expected to grow at a CAGR of 17% from 2022 to 2027, surpassing 23 million units annually by 2027. The inability of the current platforms to scale effectively to mMIMO dimensions or support new O-RAN use cases where power and cost are significant factors has disrupted the market and opens the door for new entrants.
With this in mind, PentaG-RAN provides a groundbreaking platform for a complete L1 PHY (physical layer 1) solution with optimal hardware/software partitioning, incorporating powerful vector DSPs, PHY control DSPs, flexible 5G hardware accelerators and other specialised components required for modem processing chains. It delivers up to 10X savings in power and area compared to available FPGA and commercial-off-the-shelf (COTS) CPU based alternatives. To further reduce design risk and expediate ASIC design, CEVA’s co-creation services are available to PentaG-RAN customers for the development of their entire PHY subsystem, and up to designing the complete chip.
Guy Keshet, vice president and general manager of the mobile broadband business unit at CEVA, states: “CEVA has been at the leading edge of DSP technology in cellular infrastructure for the last decade, collaborating with leading Tier-1 OEMs to deliver the most advanced DSP architectures deployed in 5G RAN today. Our PentaG-RAN platform was formed out of this extensive experience and brings the next level platform solution to help drive the next generation of 5G chipsets for mMIMO systems and new O-RAN use cases.”
The PentaG-RAN platform addresses both base station and radio compute configurations:
Base station, supporting Macro DU/vDU and Small Cell – offering a scalable compute platform for L1 inline DU/vDU acceleration. This configuration handles the complete acceleration of the main processing chains (data and control), for both symbol-to-bit domains (including FEC) and frequency processing (including FFT and equalisation). Advanced algorithms including channel estimation and MMSE calculation are mapped to the CEVA-XC DSP for optimal processing and power efficiency. It includes a powerful resource pool for accelerating COTS platforms and supports high-PHY and low-PHY 7.2x split partitioning based on Open RAN specifications.
Radio, supporting Open RAN Low-PHY, massive MIMO and beamformer – offering a scalable compute platform for Massive MIMO beamforming processing on RRU side, including beamformer and beamforming weight calculation. This configuration offers unmatched compute and PPA efficiency, enabling customers with a competitive path for cost reduction and integration options with transceivers, compared to FPGA and other COTS solutions. It supports a range of use-cases from Small Cell and Macro, to Massive MIMO 32TR to 64TR and beyond, for both Sub-6 and mmWave and supports O-RAN 7.2x splits.
To further expedite time-to-market for PentaG-RAN licensees, the platform is supported by CEVA’s new virtual platform simulator (VPS), a unified System-C modeling environment that allows pre-silicon software development, solution dimensioning, architecture proof-of-concept, and modeling of all platform components. The VPS also includes reference software implementation for main processing chains, as well as beamforming use cases.